Samsung's LPDDR5X processing-in-memory reaches 614 GB/s internally at the cost of caching and out-of-order execution

Sources: primary, discussion
Summary: The report covers Samsung's processing-in-memory work presented at Hot Chips 2026, and puts the internal bandwidth of its LPDDR5X PIM parts at 614 GB/s. It states that PIM regions have to be mapped uncacheable and non-speculative, that regular memory accesses cannot run against the same chip while it is in PIM mode, and that there is no clean way to preempt a PIM thread once it is running.
Why it matters: In-memory compute is pitched as the way to run local inference off commodity memory, and this report prices the bandwidth gain in ISA and coherency-model changes rather than in hardware alone.