IBM demonstrates a sub-1nm nanostack chip technology

Category: Markets
Status: developing
Sources: IBM newsroom, HN
Summary: IBM announced on 2026-06-25 a research-stage 0.7nm (7 angstrom) transistor technology it calls nanostack, a three-dimensional nanosheet design packing close to 100 billion transistors on a fingernail-sized die, near double its 2021 2nm density. IBM reports up to 50% more performance or up to 70% better energy efficiency than its 2nm node and 40% SRAM scaling. It is a research demonstration with production projected around five years out.
Why it matters: A credible sub-1nm path signals continued density scaling for AI-class silicon, though the multi-year horizon limits near-term engineering impact.
Follow-up: Track foundry commitments and any move from research demonstration toward a manufacturable node.